When the input is at the logic “HIGH” level, the 74LS04 will invert the “HIGH” to “LOW” and switch off the relay to turn off the lamp.įigure 5: A Multisim circuit showing “NOT” logic to control an external circuitĪn inversion logic or NOT logic can also be achieved by using NAND or NOR gate. The relay thus turns on the lamp through an external circuit of 12V. The NOT gate (74LS04) energizes the relay when a “LOW” logic input is applied. In the following figure, a NOT gate is used to drive a 12V relay to switch on the lamp using NI Multisim. The most commonly used NOT logic packages are:įigure 4: 74LS04 Package having hex “NOT” gates Example of OR Logic Normally 4 or 6 NOT gates are packed within a single commercial IC package. The logic NOT gate is available in both TTL and CMOS logic families.

Figure 3: Logic Gates with Inversion Bubbles The following set of figures show a number of variations of logic inversions. The active-low signals are represented by circles at the pins of an IC’s pinout diagram. It is simply an inversion at the input of a logic gate. The “Inversion Bubble” can also be used at the inputs to represents an active-low signal which leads to a logic “HIGH” even though the input level is at “LOW”. Such as the “Inversion Bubble” at the output of AND and OR gates will represent a logic of NAND and NOR, respectively. The “Inversion Bubble” is also used in other logic gates to denote the logic inversion. The simple truth table of a simple NOT gate is: The symbol of a logic NOT gate is shown below: Figure 2: Logic “NOT” Gate Symbol The base or flat side of the triangle has the input connected to it.

The circle denotes the inversion and is called “Inversion Bubble”. The logic NOT gate symbol has a triangular shape and points towards the output with a circle. It is obvious that the circuit is performing as a function of inverter or logic NOT gate. Hence, a logic “LOW” appears at the input. Whereas, a logic “HIGH” at the input of the base will switch the transistor to an “ON” state and connects the output to the ground or zero potential.

At logic “LOW”, the transistor will be in “OFF” state and the logic “HIGH” appears at the output. The transistor switches between saturated “ON” and “OFF” states depending upon the signal present at its base. The logic NOT gate can be constructed using a simple Resistor – Transistor logic as shown in the following figure: Figure 1: The Resistor-Transistor Logic “NOT” Gate The logic NOT Boolean expression or logic can be expressed as: Q= A’ Resistor – Transistor NOT Gate When the input will be “HIGH” its output will NOT be “HIGH” and, similarly, when its input is “LOW” then its output will NOT be “LOW”. In other words, a logic NOT gate complements the input signal at its output.īecause of its complementing response, it is called a logic NOT gate. The logic NOT gate is also termed as Inverting Buffer or an Inverter because of its inverting response.Ī logic level of “LOW” at the input of a logic NOT gate will be returned as “HIGH” at its output and a logic “HIGH” input will be inverted to “LOW” at the output. It is the simplest and most basic form of a logic gate having only one input and one output. The logic NOT gate always returns a not (opposite) of the input signal.

Transistor gate tables